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HOLT Corporation 1553 IP core demo kit ADK-6300

Demo kit ADK-6300 to support FPGA implementation by integrating Holt's HI-6300 IP core into Vivado design.

This kit is provided to integrate the HI-6300 IP core into Vivado designs and assist with FPGA implementation. The accompanying software demonstrates access to the IP's bus controller (BC), remote terminal (RT), and monitor (MT) functions using the Holt API library. This demonstration uses the Xilinx Zynq UltraScale+ MPSoC ZCU102 evaluation kit. The embedded ARM Cortex-A53 interfaces with the HI-6300 IP core via the AXI4 bus and runs the demonstration software. The demo project is a bare-metal implementation using the Holt API software library. This software can be accessed from a terminal console via the USB/UART connector.